Verification Architect/ Engineer

Job Description

NOC Design Verification Staff Engineer | Qualcomm

The Tone:
This is a full-time role at Qualcomm, located in India. Qualcomm is a leading technology innovator, pushing boundaries to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a NOC Design Verification Staff Engineer, you will play a critical role in verifying the integrity and functionality of essential infrastructure IPs, ensuring the quality of next-generation System-on-Chips for smartphones, tablets, and other cutting-edge products.

The TL;DR
• Role: Full Time
• Type: Full-time
• Location: In-person, India

• Team: Engineering Group > Hardware Engineering
• Mission: Responsible for the verification of next-generation Infrastructure IPs (such as DDRSS and Memory Controllers) which are integrated into System-on-Chips.
• Tech Stack: UVM, ARM bus protocols, System Verilog, SystemC, Python, Perl, Certitude, VC Formal, VPlan

What You’ll Actually Do
• Ownership: Own the DV test bench and all associated collaterals including checkers, trackers, scoreboards, assertions, and functional coverage.
• Test Planning & Coverage: Develop comprehensive test plans and test cases to cover design features, driving closure for code and functional coverage across verification levels.
• Debugging & Collaboration: Work closely with System Architects, Design, and emulation teams to debug failures and achieve code/functional coverage closure.
• Quality Assurance: Ensure quality sign-off for verification efforts and prepare all required documentation.
• Tooling & Post-Silicon Support: Develop and deploy scripts/tools for validation, and debug post-silicon issues in collaboration with Design, Software, and test teams.

The Must-Haves
• Background: Bachelor’s or Master’s degree in Electronics & Communication, Micro Electronics, Computer Science, Electrical/Electronics Engineering, or a related engineering field.
• Experience: 8+ years of experience in IP verification or related hardware engineering work experience, specifically as a Verification Architect/Engineer.
• Skills: Expertise in UVM-based verification, strong debugging, analytical, and problem-solving skills, and knowledgeable about ARM bus protocols, Virtual Memory concepts, and SoC system architecture.
• Bonus: Experience in designs optimized for low power, experience verifying designs meeting Automotive Safety Integrity Levels (ASIL), proficiency in scripting languages (Python or Perl), and post-silicon bring-up and HW-SW debug experience.