CPU CAD Methodology Engineer II
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Job Description
About Google
Google’s mission is to organize the world’s information and make it universally accessible and useful. Google creates radically helpful experiences by combining the best of Google AI, Software, and Hardware. Google’s team researches, designs, and develops new technologies and hardware to make computing faster, seamless, and more powerful. Ultimately, the aim is to make people’s lives better through technology.
About the Job – CPU CAD Methodology Engineer II
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware; instead, we have to make it ourselves. In this role, the successful candidate will be responsible for developing design methodology and CAD flows for the next generation CPU. They will contribute to the implementation flows leveraging industry tools and collaborate with infrastructure, physical design, technology and Electronic Design Automation (EDA) partners closely to implement the next generation processor flows to achieve Performance, Power, and Area (PPA) metrics.
Responsibilities
• Develop industry-leading high-performance and low-power complex design flows for advanced CPUs
• Collaborate with cross-functional teams to develop efficient flows, tools, and features
• Perform technical evaluations of vendors, process nodes, and IP, and provide recommendations
Minimum Qualifications
• Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience
• 4 years of experience in developing high-performance, low-power design methodology or CAD flows in synthesis and implementation areas
• Experience in writing production scripts for implementation and sign-off tools
Preferred Qualifications
• Experience in evaluating multiple vendor solutions and driving tool decisions
• Experience in advanced technology nodes
• Knowledge of computer architecture and cutting-edge technology nodes across foundries
• Ability to deliver metric-driven PPA flow development and support
