Physical Design Intern

Job Description

Physical Design Engineer Intern, BS – Summer 2027 | Marvell Technology

The Tone:
This is an internship at Marvell Technology, with location not specified in the listing. Marvell develops semiconductor solutions that serve as the essential building blocks of the data infrastructure connecting our world, delivering innovative technology across enterprise, cloud, AI, and carrier architectures. This role offers the opportunity to contribute to next-generation cloud, AI, storage, and networking solutions, enabling new possibilities and affecting the trajectory of industries. Marvell seeks individuals ready to make their mark on purposeful and enduring innovation, thriving, learning, and leading within a company that fuels tomorrow’s transformative potential.

The TL;DR
• Role: Internship
• Pay: $29–$57 hourly
• Team: Within Marvell’s Physical Design teams, collaborating with direct team and cross-functional partners.
• Mission: Work through technical design challenges to ensure designs meet performance, power, and area requirements.
• Tech Stack: PrimeTime, Tempus, Python, TCL, Perl, Shell, Synopsys, Cadence, Mentor, Verilog, SystemVerilog

What You’ll Actually Do
• Implementation: Perform synthesis, floor planning, place and route, clock insertion, timing analysis, and timing closure on complex logic blocks using industry standard EDA tools.
• Scripting: Write scripts in Python, TCL, Perl, and Shell to aid design and development activities.
• Debugging: Utilize problem-solving skills to analyze, debug, and implement fixes for design violations using CAD tools.
• Collaboration: Collaborate with RTL, Synthesis, and other Design teams to resolve congestion and timing bottlenecks.
• Project Delivery: Ensure that all designs converge and integrate in a timely manner, meeting performance, power, and area requirements.

The Must-Haves
• Background: Currently enrolled in a Bachelor’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028.
• Experience: Completed academic coursework with a focus on core areas critical to physical design, including VLSI, digital logic, circuit design, computer architecture, RTL synthesis, Verilog or SystemVerilog, place and route, static timing analysis, digital systems, or microelectronics. Practical experience working in a Unix type environment is also required.
• Skills: Demonstrated proficiency in programming and scripting languages such as Python, TCL, Perl, and Shell, vital for design automation and development activities. Experience utilizing industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys (e.g., PrimeTime), Cadence (e.g., Tempus), and Mentor for design tasks. Possess strong analytical, problem-solving, and communication skills essential for technical collaboration and issue resolution.